1. Field
This disclosure relates generally to forming semiconductor devices, and more specifically, to forming semiconductor packages having more than one device.
2. Related Art
It is desirable to provide semiconductor packages that have multiple devices. One manufacturing process includes forming electrical contacts on both sides of a substrate (i.e., double sided build up or 3D (three dimensional) structure). To form a 3D structure, thru vias are formed within a substrate to provide connections between the top surface and the bottom surface of a substrate. The thru vias are difficult to manufacture and may have electrical and mechanical weaknesses. During the build up process, residual stresses are created, which causes panel to undesirably warp. In addition, the cost of the double sides build up is high due to the many processing steps of the process. Hence, a need exists for a method to form a 3D structure, that does not have the disadvantages of the prior art.